Ahmed S. Emara
Ph.D., P.Eng.
About Me
Ahmed S. Emara, Ph.D., P.Eng., is a Staff Analog and Mixed-Signal Design Engineer, currently working at Marvell Technology, where he designs receiver analog front end (Rx AFE) and high-resolution analog-to-digital converters (ADCs) used for test purposes within Serializer/Deserializer (SerDes) systems. Prior to joining Marvell, Ahmed spent more than three years at Synopsys in Mississauga, Ontario, Canada, where he specialized in designing and verifying various components within SerDes systems, ensuring alignment with PCIe and Ethernet standards. He specifically worked on the design of Transmitter (Tx) clocking circuitry, including duty cycle correction (DCC) circuits, as well as clock distribution and calibration circuits.
Before his time at Synopsys, Ahmed pursued a Ph.D. in Electrical and Computer Engineering at McGill University in Montreal, Quebec, Canada, graduating in 2021. During his doctoral studies, Ahmed collaborated with Ciena in Ottawa, Ontario, Canada, focusing on high-resolution digital-to-analog converters (DACs) design. Prior to his doctoral studies, Ahmed completed his B.Sc. and M.Sc. in Electronics Engineering at the American University in Cairo, Egypt, in 2014 and 2016, respectively. He is a licensed Professional Engineer (P.Eng.) in Canada.
Ahmed has authored or co-authored more than 20 papers in scientific journals and conferences and currently holds a U.S. patent. His primary research interests revolve around analog and mixed-signal IC design and testing.
Teaching Experience
Teaching Assistant at McGill University (2017-2020):
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1- Introduction to Electronics (ECSE 331)
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2- Microelectronics (ECSE 335)
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3- Mixed-Signal Test Techniques (ECSE 435)
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4- Analog Microelectronics (ECSE 534)
Teaching Assistant at the American University in Cairo (2014-2016):
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5- Digital Logic Design (ECNG 2101)
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6- Testing of Digital Circuits (ECNG 4103)
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Research Interests
Research Interests:
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1- Analog and Digital VLSI Testing
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2- Design of High-Resolution Data Converters
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3-Low Power Robust Digital Circuit Design
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4- Active and Passive Filter Design
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5- Sigma-Delta Modulators
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Publications
US Patents
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1- Sadok Aouini, Ahmed S. Emara, Gordon W. Roberts, Mahdi Parvizi and Naim Ben-Hamida, “Extremely-Fine Resolution Sub-Ranging Current Mode Digital-Analog-Converter using Sigma-Delta Modulators,” U.S. Patent 10,425,099, Granted: September 24, 2019.
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Book Chapters
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2- Sherif H. Amer, Ahmed H. Madian, Hany M. Elsayed and Ahmed S. Emara, “Theory, Modeling and Design of Memristor-Based Min-Max Circuits,” Advances in Memristors, Memristive Devices and Systems, Springer, 2017, 187-205.
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Journal Publications
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3- Mahmood A. Mohammed, Firas Al-Dirini, Ahmed S. Emara, and Gordon W. Roberts, "Design for Slew-Rate in Multi-Stage CMOS OTAs" accepted for publication in IEEE Transactions on Circuits and Systems I: Regular Papers, August 2025.
4- Ahmed S. Emara, Denis Romanov, Gordon W. Roberts, Sadok Aouini, Mahdi Parvizi and Naim Ben-Hamida,"An Area-Efficient High-Resolution Segmented ΣΔ-DAC for Built-In Self-Test Applications" IEEE Transactions on Very Large Scale Integration (TVLSI), vol. 29, no. 11, pp. 1861-1874, November 2021.
5- Ahmed S. Emara, Denis Romanov, Gordon W. Roberts, Sadok Aouini, Mahdi Parvizi and Naim Ben-Hamida, “Optimized Periodic ΣΔ Bitstreams for DC Signal Generation used in Dynamic Calibration Applications,” IEEE Open Journal of Circuits and Systems (OJCAS), Vol. 1, Issue. 1, pp. 3-12, March 2020.
6- Ahmed S. Emara, Ahmed H. Madian, Hassanein H. Amer, Sherif H. Amer and Mohamed B. Abdelhalim, “On the Production Testing of Memristor Ratioed Logic (MRL) Gates,” Circuits and Systems, Scientific Research Publishing, Vol. 7, August 2016, pp. 3016-3025.
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Conference Publications
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7- Sherif H. Amer, Ahmed S. Emara, Hassanein H. Amer, "Method for Yield Enhancement of ReRAM Memory Arrays via Reference Voltage Calibration," proceedings of Nanotechnology Materials and Devices Conference (NMDC), October 2024.
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8- Mahmood A. Mohammed, Ahmed S. Emara, Gordon W. Roberts, “Slew-Rate Analysis of Scalable Multi-Stage CMOS Operational Transconductance Amplifiers” submitted to the proceedings of Midwest Symposium on Circuits and Systems (MWSCAS), August 2024.
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9- Fekry Y. Mohamed, Ahmed S. Emara, Hassanein H. Amer, “Detection of Catastrophic Faults in 6-bit R-2R Ladder DAC,” proceedings of International Conference on Electrical, Electronics, and Information Engineering (ICEEIE), Malang, Indonesia, September 2023, pp. 1-5.
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10- Beatrice Shokry, Hassanein Amer, Ramez Daoud, Mahmoud Rumman and Ahmed S. Emara, “Error Detection and Masking Circuit with High Diagnosability for Redundant Sensors,” proceedings of Mediterranean Embedded Computing Resources (MECO), June 2023, pp. 1-5.
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11- Ahmed S. Emara, Gordon W. Roberts, Sadok Aouini, Mahdi Parvizi, and Naim Ben-Hamida, “Using Optimized Butterworth-Based ΣΔ Bitstreams for the Testing of High-Resolution Data Converters,” proceedings of New Circuits and Systems (NEWCAS), June 2020, pp. 299-302.
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12- Ahmed S. Emara, Gordon W. Roberts, Sadok Aouini, Mahdi Parvizi and N. Ben-Hamida, “Selecting the Fastest Settling-Time Filter in PDM-based DACs used for Dynamic Calibration Applications,” proceedings of Midwest Symposium on Circuits and Systems (MWSCAS), August 2019, pp.900-903.
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13- Ahmed S. Emara, Gordon W. Roberts, Sadok Aouini, Mahdi Parvizi and N. Ben-Hamida, “On the Design of DACs for Dynamic Calibration Applications using Periodic Sequences from ΣΔ Modulators,” proceedings of the Circuits, Devices and Systems Symposium of the IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), May 2019, pp. 1-4.
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14- Ahmed S. Emara, Ahmed H. Madian, Hassanein H. Amer, Sherif H. Amer, and Mohamed B. Abdelhalim, “Testing of memristor ratioed logic (MRL) XOR gate,” proceedings of the International Conference on Microelectronics (ICM), December 2016, pp. 181–184.
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15- Manar N. Shaker, Ahmed H. Madian, Mohamed B. Abdelhalim, Sherif H. Amer, Ahmed S. Emara and Hassanein H. Amer, “Effect of open faults in FPGA switch matrices on fault detection mechanisms,” proceedings of the International Conference on Microelectronics (ICM), December 2016, pp. 233–236.
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16- Abdullah A. Abdulslam, Sherif H. Amer, Ahmed S. Emara, and Yehea Ismail, “Evaluation of multi-level buck converters for low-power applications,” in proceedings of the International Symposium on Circuits and Systems (ISCAS), May 2016, pp. 794–797.
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17- Sherif H. Amer, Ahmed H. Madian, Hany M. Elsayed and Ahmed S. Emara, “Effect of the memristor threshold current on memristor-based Min-Max circuits,” proceedings of the International Modern Circuits and Systems Technologies (MOCAST), May 2016, pp. 1-4.
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18- Ahmed S. Emara, Ahmed H. Madian, Hassanein H. Amer and Sherif H. Amer, “High Coverage Test for the Second Generation Current Conveyor,” proceedings of the International Conference on Electronics, Circuits, and Systems (ICECS), December 2015, pp. 429-432.
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19- Sherif H. Amer, Ahmed H. Madian and Ahmed S. Emara, “Design and Analysis of Memristor-based min-max circuit,” proceedings of the International Conference on Electronics, Circuits, and Systems (ICECS), December 2015, pp. 187-190.
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20- Sherif H. Amer, Ahmed H. Madian and Ahmed S. Emara, “Memristor-based Center-Of-Gravity (COG) defuzzifier circuit,” proceedings of the European Conference on Circuit Theory and Design (ECCTD), August 2015, pp. 1-4.
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21- Rana Mohie-Eldin, Ahmed S. Emara, Sherif H. Amer, Mahmoud M. Fouad, Ahmed H. Madian, Hassanein H. Amer, Mohamed B. Abdelhalim and Hiba H. Draz, “Effect of the Resistance of Open and Short Faults on the Production Testing of MCML Gates,” proceedings of the Biennial Baltic Electronics Conference (BEC), October 2014, pp. 81-84.
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22- Sherif H. Amer, Ahmed S. Emara, Rana Mohie-Eldin, Mahmoud M. Fouad, Ahmed H. Madian, Hassanein H. Amer, Mohamed B. Abdelhalim and Hiba H. Draz, “Testing current mode two-input logic gates,” proceedings of the Circuits, Devices and Systems Symposium of the IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), May 2014, pp. 1-6.
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Master Thesis:
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23- Ahmed S. Emara, On the Production Testing of Analog and Digital Circuits, May 2016.
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Doctoral Thesis:
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24- Ahmed S. Emara, Designing area-efficient programmable DC voltage generators using sigma-delta bitstreams for testing applications, November 2021.
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Last updated August 2025